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Silicon Labs /EFR32BG24A020F1024IM40 /PRS_S /ASYNC_SWPULSE

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Interpret as ASYNC_SWPULSE

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https://regviz.com/r/Silicon Labs/EFR32MG24A120F1536GM48/PRS_S/ASYNC_SWPULSE#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CH0PULSE)CH0PULSE 0 (CH1PULSE)CH1PULSE 0 (CH2PULSE)CH2PULSE 0 (CH3PULSE)CH3PULSE 0 (CH4PULSE)CH4PULSE 0 (CH5PULSE)CH5PULSE 0 (CH6PULSE)CH6PULSE 0 (CH7PULSE)CH7PULSE 0 (CH8PULSE)CH8PULSE 0 (CH9PULSE)CH9PULSE 0 (CH10PULSE)CH10PULSE 0 (CH11PULSE)CH11PULSE 0 (CH12PULSE)CH12PULSE 0 (CH13PULSE)CH13PULSE 0 (CH14PULSE)CH14PULSE 0 (CH15PULSE)CH15PULSE

Description

No Description

Fields

CH0PULSE

Channel pulse
CH1PULSE

Channel pulse
CH2PULSE

Channel pulse
CH3PULSE

Channel pulse
CH4PULSE

Channel pulse
CH5PULSE

Channel pulse
CH6PULSE

Channel pulse
CH7PULSE

Channel pulse
CH8PULSE

Channel pulse
CH9PULSE

Channel pulse
CH10PULSE

Channel pulse
CH11PULSE

Channel pulse
CH12PULSE

Channel pulse
CH13PULSE

Channel pulse
CH14PULSE

Channel pulse
CH15PULSE

Channel pulse

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data